About EBMC

EBMC is a Model Checker for hardware designs. It includes both bounded and unbounded analysis, i.e., it can both discover bugs and is also able to prove the absence of bugs. It can read Netlists (ISCAS89 format), Verilog, System Verilog and SMV files. Properties can be given in LTL or a fragment of System Verilog Assertions.

The unwound circuits can be exported as DIMACS CNF (bit-level) or in the SMT-LIB 2 format (word-level).


Versions up to (including) 4.1 have also supported the following methods:

Authors: Daniel Kroening and Mitra Purandare.


NEW: There is now a Google Group for annoucements related to EBMC.

EBMC 4.4 released on 3.7.2017!


The EBMC Manual describes the command line options of EBMC. We also provide papers that provide background on how EBMC works:

You should also read the license.



We currently only distribute binaries for x86 Linux and Windows. We do not distribute source code.



This research is supported by the Semiconductor Research Corporation (SRC) under con­tracts no. 2006-TJ-1539, 2012-TJ-2269 and 2016-CT-2707.